Graduate Student Posters 2007


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07. Serial Logarithmic LUT Model Implementation

Authors: Thomas Peters-Hall, Charles Butterhof

The aim of our research is to implement a serial Mitchell machine. This particular machine is used as the basis of a Logarithmic Number System Arithmetic Logic Unit. We will implement the machine using a self created model of a Xilinx 4000 Field Programmable Gate Array Configurable Logic Block. Once we create this model, we will compare it to similar models generated by automatic hardware generation tools, such as Verilog Implicit to One Hot.