The content on this page is the work of Professor Mark Arnold.  Although these pages remain active as a courtesy, Professor Arnold is no longer on the Lehigh faculty and the content may be no longer current or accurate
DLX in VHDL
The DLX processor is a theoretical microprocessor. To my knowledge it has never been fabricated in silicon for comercial sale. Its main purpose is to allow people to study, teach, and practice with microprocessor design. The DLX instruction set architecture is very similar to MIPS, although they have some differences. DLX is a load/store, RISC architecture.

The goal of my project was to design a VHDL model of the DLX processor. In my VHDL implementation of DLX, most instructions require 5 clock cycles to complete, however, jumps need only 3. Floating point timing is not completely accurate because floating point instructions also take only 5 cycles to complete. Some of the more formidable accomplisments in this design were:

Download the VHDL source code

Acknowledgement: This project was supported by a National Science Foundation Research Experience for Undergraduates Award.


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