ISCA 2006 Tutorial (A half-day tutorial)

Network Systems Design with Network Processor Technology

The PDF version of this webpage is available here.

Presenter and Contact Information
Name: Liang Cheng (Ph.D., Assistant Professor; Director, Laboratory Of Networking Group)
Address: 19 Memorial Drive West, Bethlehem, PA 18015
Phone: 610-758-5941
Fax: 610-758-4096
Email: cheng AT
Abstract and Keywords
Abstract: This tutorial discusses the design and implementation of "network systems" such as Firewalls, Ethernet switches, and Internet routers. It covers design principles and issues of traditional protocol processing systems and network processor technology. This tutorial is a concise version of the course offered by Dr. Cheng at Lehigh University: Network Systems Design (URL: with collaborations with researchers from Agere Systems, Inc.

Keywords: Router architecture, network processors, high-speed packet processing, packet classification.
It is an in-depth study of network systems design with network processor technology.
Audience and Prerequisite
The attendees could be anyone who is interested in learning how to offer high-speed packet processing power in the network devices. The attendees are expected to have basic knowledge about computer networking.
Network processor technology is an essential approach to offer high-speed packet processing power in network devices for high-performance routing/switching, core network service provisioning, policy support, multimedia home networks, and network quality-of-service (QoS) support.
The participants will learn (i) the design and implementation principles of "network systems" such as Firewalls, Ethernet switches, and Internet routers; and (ii) design principles and issues of traditional protocol processing systems and network processor technology for high-speed packet processing.
Part I: Traditional Network Systems (1 hour)
Introduction on computer networks
Computer architecture of network systems
Packet processing algorithms
Packet processing functions
Protocol software
Hardware architecture for packet processing
Classification and forwarding
Switching fabrics

Part II: Network Processor Technology (1 hour)
Network processor introduction
Complexity of network processor design
Network processor architectures
Scaling a network processor
Design tradeoffs and consequences

Part III: Example Network Processor (1 hour)
-- with lab demos co-designed with Dr. Dale Parson of Agere Systems, Inc.
Overview of Agere network processor and FPL classification language
System architecture and modeling
Stateful network processor applications
Policing, buffer management and traffic shaping
Network processing trends
Corresponding to the outline above, a hard copy of about 180 slides will be handed out to the tutorial attendees.
D. Comer, Network Systems Design using Network Processors, Agere Version, Prentice Hall, October 2004, ISBN: 0131489275.
Other Information
This tutorial has been offered at HPSR 2005 (2005 IEEE Workshop on High Performance Switching and Routing, Hong Kong, May 12-14, 2005;
Biographical Sketch
Dr. Liang ChengĄ¯s biographical information is available at the following URL: